SGDK
A free and open development kit for the Sega Mega Drive
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16c550.h
1/************************************************************************/
9
10#ifndef _16C550_H_
11#define _16C550_H_
12
13#include "types.h"
14
16#define UART_BASE 0xA130C1
17
19#define UART_CLK 24000000LU
20
23#define UART_BR 1500000LU
24//#define UART_BR 500000LU
25//#define UART_BR 750000LU
26//#define UART_BR 115200
27
29#define UART_TX_FIFO_LEN 16
30
32#define DivWithRounding(dividend, divisor) ((((dividend)*2/(divisor))+1)/2)
34#define UART_DLM_VAL (DivWithRounding(UART_CLK, 16 * UART_BR)>>8)
35//#define UART_DLM_VAL ((UART_CLK/16/UART_BR)>>8)
37#define UART_DLL_VAL (DivWithRounding(UART_CLK, 16 * UART_BR) & 0xFF)
38//#define UART_DLL_VAL ((UART_CLK/16/UART_BR)&0xFF)
39
48#define UART_RHR (*((volatile uint8_t*)(UART_BASE + 0)))
50#define UART_THR (*((volatile uint8_t*)(UART_BASE + 0)))
52#define UART_IER (*((volatile uint8_t*)(UART_BASE + 2)))
54#define UART_FCR (*((volatile uint8_t*)(UART_BASE + 4)))
56#define UART_ISR (*((volatile uint8_t*)(UART_BASE + 4)))
58#define UART_LCR (*((volatile uint8_t*)(UART_BASE + 6)))
60#define UART_MCR (*((volatile uint8_t*)(UART_BASE + 8)))
62#define UART_LSR (*((volatile uint8_t*)(UART_BASE + 10)))
64#define UART_MSR (*((volatile uint8_t*)(UART_BASE + 12)))
66#define UART_SPR (*((volatile uint8_t*)(UART_BASE + 14)))
68#define UART_DLL (*((volatile uint8_t*)(UART_BASE + 0)))
70#define UART_DLM (*((volatile uint8_t*)(UART_BASE + 2)))
72
74typedef struct {
75 uint8_t IER;
76 uint8_t FCR;
77 uint8_t LCR;
78 uint8_t MCR;
79} UartShadow;
80
82extern UartShadow sh;
83
88#define UART_MCR__DTR 0x01
89#define UART_MCR__RTS 0x02
90#define UART_MCR__OUT1 0x04
91#define UART_MCR__OUT2 0x08
93
97#define UART_MSR__DSR 0x20
99
100/************************************************************************/
105void uart_init(void);
106
107/************************************************************************/
113#define uart_tx_ready() (UART_LSR & 0x20)
114
115/************************************************************************/
120#define uart_rx_ready() (UART_LSR & 0x01)
121
122/************************************************************************/
128#define uart_putc(c) do{UART_RHR = (c);}while(0);
129
130/************************************************************************/
136#define uart_getc() (UART_RHR)
137
138/************************************************************************/
144#define uart_set(reg, val) do{sh.reg = (val);UART_##reg = (val);}while(0)
145
146/************************************************************************/
152#define uart_get(reg) (sh.reg)
153
154/************************************************************************/
160#define uart_set_bits(reg, val) do{sh.reg |= (val); \
161 UART_##reg = sh.reg;}while(0)
162
163/************************************************************************/
169#define uart_clr_bits(reg, val) do{sh.reg &= ~(val); \
170 UART_##reg = sh.reg;}while(0)
171
172/************************************************************************/
175#define uart_reset_fifos() uart_set_bits(FCR, 0x07)
176
177/************************************************************************/
183#define uart_test(reg, val) reg = val; \
184 if (reg != val) return MW_ERR
185
186#endif /*_16C550_H_*/
187
189
uart_init
void uart_init(void)
Initializes the driver. The baud rate is set to UART_BR, and the UART FIFOs are enabled....
sh
UartShadow sh
Uart shadow registers. Do NOT access directly!
UartShadow
Structure with the shadow registers.
Definition 16c550.h:74
UartShadow::MCR
uint8_t MCR
Modem Control Register.
Definition 16c550.h:78
UartShadow::FCR
uint8_t FCR
FIFO Control Register.
Definition 16c550.h:76
UartShadow::LCR
uint8_t LCR
Line Control Register.
Definition 16c550.h:77
UartShadow::IER
uint8_t IER
Interrupt Enable Register.
Definition 16c550.h:75
types.h
Types definition.