16C550 UART registers More...

Collaboration diagram for UartRegs:

Macros
#define	UART_RHR (((volatile uint8_t)(UART_BASE + 0)))
	Receiver holding register. Read only.
#define	UART_THR (((volatile uint8_t)(UART_BASE + 0)))
	Transmit holding register. Write only.
#define	UART_IER (((volatile uint8_t)(UART_BASE + 2)))
	Interrupt enable register. Write only.
#define	UART_FCR (((volatile uint8_t)(UART_BASE + 4)))
	FIFO control register. Write only.
#define	UART_ISR (((volatile uint8_t)(UART_BASE + 4)))
	Interrupt status register. Read only.
#define	UART_LCR (((volatile uint8_t)(UART_BASE + 6)))
	Line control register. Write only.
#define	UART_MCR (((volatile uint8_t)(UART_BASE + 8)))
	Modem control register. Write only.
#define	UART_LSR (((volatile uint8_t)(UART_BASE + 10)))
	Line status register. Read only.
#define	UART_MSR (((volatile uint8_t)(UART_BASE + 12)))
	Modem status register. Read only.
#define	UART_SPR (((volatile uint8_t)(UART_BASE + 14)))
	Scratchpad register.
#define	UART_DLL (((volatile uint8_t)(UART_BASE + 0)))
	Divisor latch LSB. Acessed only when LCR[7] = 1.
#define	UART_DLM (((volatile uint8_t)(UART_BASE + 2)))
	Divisor latch MSB. Acessed only when LCR[7] = 1.

Detailed Description

16C550 UART registers

Note: Do NOT access IER, FCR, LCR and MCR directly, use Set/Get functions. Remaining registers can be directly accessed, but meeting the read only/write only restrictions.

Macros